Electronic – 0 definitions of operator “*” match here for signed type (numeric_std, VHDL)

fpgaliberovhdl

I'm writing a package to add supporting functions and types for creating an FIR filter. In the mult function, I'm trying to multiply two signed types, which should be supported in IEEE.numeric_std library. The error I'm getting (using Libero IDE) is:

0 definitions of operator "*" match here

Here's the code:

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use ieee.numeric_std.all;

package fir_pkg is
    constant taps : integer := 8;
    constant bit_width : integer := 8;
    type fract is array(bit_width-1 downto 0) of std_logic;
    type fract2 is array((2*bit_width)-1 downto 0) of std_logic;
    type fract_sequence is array(taps-1 downto 0) of fract;
    type fract2_sequence is array(taps-1 downto 0) of fract2;
    function mult(a,b: fract_sequence) return fract2_sequence;
end package fir_pkg;

package body fir_pkg is

    function mult(a,b: fract_sequence) return fract2_sequence is
        variable a_s, b_s:signed(bit_width-1 downto 0);
        variable seq: fract2_sequence;
    begin
        for i in a'range loop
            a_s := signed(a(i));
            b_s := signed(b(i));
            seq(i) := a_s * b_s;
        end loop;
        return seq;
    end mult;

end fir_pkg;

Best Answer

Show me why you can't make fract and fract2 subtypes of std_logic_vector:

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use ieee.numeric_std.all;

package fir_pkg is
    constant taps : integer := 8;
    constant bit_width : integer := 8;

    subtype fract is std_logic_vector (bit_width-1 downto 0);
    -- type fract is array(bit_width-1 downto 0) of std_logic;
    -- type fract2 is array((2*bit_width)-1 downto 0) of std_logic;
    subtype fract2 is std_logic_vector(2*bit_width-1 downto 0);

    type fract_sequence is array(taps-1 downto 0) of fract;
    type fract2_sequence is array(taps-1 downto 0) of fract2;
    function mult(a,b: fract_sequence) return fract2_sequence;
end package fir_pkg;

package body fir_pkg is

    function mult(a,b: fract_sequence) return fract2_sequence is
        variable a_s, b_s:signed(bit_width-1 downto 0);
        variable seq: fract2_sequence;
    begin
        for i in a'range loop
            a_s := signed(a(i));
            b_s := signed(b(i));
            seq(i) := std_logic_vector(a_s * b_s);
        end loop;
        return seq;
    end mult;

end fir_pkg;