in my experience having truly separate AGND and DGND nets almost never works out well in practice. 90% of the designs i see that try to do this end up with current loops that introduce EMI issues and can generate more noise in the analog portions of the circuit than using a single ground with careful part placement would.
Having two GND planes also creates a problem for routing in that signals referenced to a particular ground should only ever be run on layers that are adjacent to this plane or its associate power plane. This can result is a pretty funky stack up that can limit where you can run traces. Your best answer would be AGND,signal,?GND,POWER,signal,DGND but thats funky to layout, uses lots of vias, only gives 2 signal layers to route on.
What i would recommend is a single solid ground plane and careful part placement. High speed digital signals and noise will follow the path of least inductance to ground not the path of least resistance. The path of least inductance is the smallest loop area, for signals this is directly under the trace on the adjacent ground plane. In some cases a ground pour on top, bottom, or both can be helpful in reducing noise pick up as well. This is dependent on the components and the design layout.
Create virtual partitions, keep out areas, where you only run either analog or digital signals, keeping in mind that the return current path for the low frequency analog signals is the path of least resistance, while the return path for the high speed digital signals is the path of least inductance. As long as your careful to ensure that the return current paths don't cross, especially a digital return running under your analog sections. You shouldn't get much noise pick up at all.
If your have a particular device that is very sensitive to noise, such as a high resolution ADC, you can use a ground island to increase noise immunity, like this:
alt text http://www.hottconsultants.com/techtips/a-d%20gnd%20plane.gif
In cases where i have some sensitive analog circuitry i will usually also use a power island that is separated from the digital power supply by an LC filter of some sort, depending on the digital frequencies i'm wishing to block.
It's more usual to have the ground and power planes on the inner layers. It's best to keep them free of tracks.
Just use a short track and a via to connect leads to the other layers.
Best Answer
It's not that much different to design for 4 layers compared to 2.
A couple things I can think of:
If you are running very large currents, tracks on the inner layers have higher thermal resistance to the ambient air, so need to be designed wider for the same ampacity.
You need to make more decisions about the stack-up. Do you want a thick middle dielectric layer and two thinner outer dielectrics, or the other way around. Do you want the inner dielectric to be a core with two pre-preg layers laminated on (foil construction, because the outer copper layers will be "foils" laid onto the unclad outer layers); or do you want a pre-preg sandwiched between two cores (I forgot what this is called). Specify all the dimensions and which layers are core or pre-preg on your fab drawing.
Unless you want to pay extra, you will connect between layers using a drilled hole ("via") that goes all the way through the board. You can connect to that via on as many or as few of the layers as you want.