I've got a lot of experience with rather "low-level" electronics (resistor networks, passive filters, basic op-amp circuits) and some experience with higher-level stuff like micro-controllers, but I am currently struggling with learning the bits in between. As such, apologies if this question is daft or an obvious duplicate but here goes.
I have been working on a circuit which a colleague of mine designed which includes an LTC6655 2.5V voltage reference. In the circuit, and on the datasheet, the device calls for a 10uF cap to be placed on its outputs, but it doesn't say why. Since I was waiting for a delivery of 10uF caps and only had smaller ones, I foolishly assumed it was just there for line smoothing/filtering and decided that it wouldn't make a difference to the testing if I just left that part out until the delivery arrived.
Of course when I powered up the circuit, the reference was only putting out 1.75V instead of 2.5V. After checking all the inputs and outputs thoroughly, and the load parameters, I was stumped and went back to my colleague who pointed out the missing capacitor as being needed "for stability". I skeptically installed the needed part (which just arrived) and immediately the thing worked as expected.
Would anyone be willing to point me to a text to explain what that capacitor is doing, or even to explain it to me themselves? I would greatly appreciate it.
Best Answer
The reference has a low dropout, so as you can see on the internal schematic (datasheet page 10) it is implemented as a bandgap reference followed by a rail to rail buffer opamp.
Notice the polarity of the output devices, the PMOS is on top and the NMOS on the bottom, which is a rail to rail output stage.
Both transistors behave as controlled current sources. It is possible to make such an opamp stable without a capacitor on the output, like most opamps, but here it is expected that the reference will have a cap on the output.
Making such a rail to rail output stage (which is very similar to a LDO) stable both with and without capacitance is difficult. Since the output transistors are controlled current sources, the output cap's value controls the open loop gain. Also its ESR adds a zero.
So, the designers settled on a particular value of capacitance and tuned the circuit for it. If you look at "output noise spectrum" page 10 on the bottom, you'll see that 10µF is optimum... this isn't a magic value, simply the designer tuned the circuit for that.
Now, datasheet page 11 gives hints on capacitor selection, so you should also read it...