If a I2C bus is runs at 400kHz what is the clock period ,data throughput in data-bits/seconds and bus efficiency? i am very new to those buses and is the clock period is 2.5 micro seconds ? any help will be appereciated.
Electronic – clock period, throughput and efficiency of I2C bus
i2cserial-bus
Best Answer
There will not be an answer to get you specific throughput numbers without actually knowing what device protocol and operational procedure that you are using. Bus utilization efficiency goes up if you operate with transactions with the device that transfer more data per START / STOP sequence.
From a raw protocol perspective the I2C bus uses 8-bit data size with 9th bit acknowledge. So assuming an SCL clock generated at a uniform rate the raw transfer efficiency will be no better than 8/9 or about 88% efficiency.
To get an idea of how to address this lets take a specific example of a simple serial EEPROM that has an I2C interface and you want to read it two data bytes per transaction. There is some overhead that we could consider as follows:
If you total up all the equivalent clock times above there are 56 of them with a usable 16 clocks of actual utilization to get the data that was being read. This gives a data access efficiency of 16/56 or about 28% efficiency.