Electronic – Design a 4-bit synchronous counter using D filp-flops and 16 x 4 ROM that can generated any arbitrary counting sequence

You can create a 3-input, 3-output circuit that maps one state in the count sequence to the next. Then feed the 3 Q outputs of the FF's into this combinatorial circuit, and connect the output of the combinatorial circuit to the 3 D inputs of the FF's. Connect all 3 of the FF's clock lines together, and then whenever an active edge comes along the flip flops act like a 3 bit register, and just load up the next value.

The key thing is to treat each bit individually.

For example, for the low-order bit, lets call it next_state[0].

state     | next_state[0]
---------------
   000    | 0
   001    | 0
   010    | 1
   011    | X
   100    | 0
   101    | 0
   110    | 0
   111    | 1

So you can write

next_state[0] = state[0] & state[1] & state[2] | ~state[0] & state[1] & ~state[2]

If you are building this with discrete logic you could simplify this to

next_state[0] = state[1] & (state[0] & state[2] | ~state[0] & ~state[2])

And you have an equation you can use to drive the flip-flop that will generate the next condition for the low-bit of the state variable.

Finding the equations for the other two state bits works the same way.