Electronic – “Design Patterns” for synthesizable RTL

Behavioral code is higher-level and usually can't be synthesized. Constructs like loops, delays, and "initial" statements are behavioral.

RTL code is lower-level and is intended to be synthesized. It defines a circuit as a combination of interconnected registers and the operations performed on signals between those registers.

Taken from Yahoo Answers and found immediately with Google!

What you are synthesizing are not memory blocks but rather register with synchronous reset - which should act exactly as you described so that is not the problem you are seeing. So it is not completely clear to me where the problem is. I suggest you add some details (e.g. version of the tools you are using to synthesize this, what other registers are in the design, embedded in blocks), then it shoudl be easier to help you. You can also check the warnings and the netlist pre- and post-synthesis to check if the registers were implemented.

PS: are you aware that h0,h1,h2,h3 are fixed to constant values - is that what you want to do? If so, you can move them out of the register block.