Electronic – difference between sensitivity list and wait vhdl

vhdl

I have sample 2bit multiplexer implemented with processes with one little different, first one has sensitivity list and second one implemented with wait.
I want to know what is difference between this two code and which one of them is more accurate?

 ARCHITECTURE Behavior OF mux2to1 IS
BEGIN
PROCESS ( a, b, s )
BEGIN
if s = '0' then
w<=a after 1.4 ns;
else
w<=b after 1.5 ns;
end if ;
END PROCESS ;
END Behavior ;

and the second code:

  ARCHITECTURE Behavior OF mux2to1 IS
    BEGIN
    PROCESS
    BEGIN
    wait on  a, b, s;
     if s = '0' then
    w<=a after 1.4 ns;
    else
    w<=b after 1.5 ns;
    end if ;
    END PROCESS ;
    END Behavior ;

Best Answer

The two processes as you have written them are almost equivalent. If you move the wait statement to the end of the second process, then they are exactly equivalent. The difference is whether or not the body of the process gets executed before the first change on any of the listed signals.

IEEE Std 1076-2008 11.3 para 4 (in part):

If a process sensitivity list appears following the reserved word process, then the process statement is assumed to contain an implicit wait statement as the last statement of the process statement part; this implicit wait statement is of the form wait on sensitivity_list ; where the sensitivity list is determined in one of two ways. If the process sensitivity list is specified as a sensitivity list, then the sensitivity list of the wait statement is that following the reserved word process. ...

Related Solutions

Electronic – VHDL: when is process sensitivity list triggered

Time is only advanced when no more processes can be awakened by any event. If process "P" is awakened by its sensitivity list, it will execute in zero time and schedule signal assignments, and these assignments may awaken other processes. If at the next delta (which does not advance time) any process (including itself) affects P's sensitivity list, then P will be re-awakened. This happens as many times as necessary (or until the simulator gives up or the set maximum number of deltas have occurred).

In the particular example of your question with ABC = 101, if you had:

process(A,B) begin 
    B <= not A; 
    C <= A xor B;
end process;

process(C) begin
end process;

When A changes to 0, BC are scheduled with assignments of 10. A delta passes, B becomes 1 and re-awakens the process, which schedules C back to 1. At the end of this second delta the values are 011, and there are no more events that could awaken the process, and when no other process can be awakened, time advances.

Consequently, process(A,B) is awakened once when A changes, and a second time when B is changed. As a result, the "process awakening counter" counts twice.

In the case of process(C), it will also be awakened twice, because C will "delta glitch" due to process(A,B).

However, if B was implicit:

process(A) begin 
    C <= A xor (not A);
end process;

process(C) begin
end process;

Or if B was a local variable:

process(A) 
    variable B : std_logic_vector;
begin 
    B := not A;
    C <= A xor (not B);
end process;

process(C) begin
end process;

Then process(A) would only be awakened once, but process(C) would remain suspended.

Electronic – Problem in synthesizing

Inside ringcounter, q3 is being assigned by both the concurrent assignment q3<='1' and DFF4. You can't have both at the same time.

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Related Solutions

Electronic – VHDL: when is process sensitivity list triggered

Electronic – Problem in synthesizing

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