First of all, before answering your questions, let me make some suggestions about the layout. I have seen your previous post and this has been a good attempt, but:
1.- The "Switching Loog" is too large. (Switching loop is Vin, Trafo, Q1 and R8, you call it,"high current loop", maybe it is no quite precise) And moreover, this loop include the control area. This is really EMI problem!! I suggest something like this.
(Think in current loops always!)
Make smaller the switching loop
- Place R8 near from C1. Really near.
- Rotate Q1 90ยบ clockwise
- Place R6 and C6 as close as possible (acap) from Trafo pins.
After that,
- Think about the "Gate net", "Sense net" and "pin 15 from controller net", It must be route separatly! The "gate net" is a radiant net and the others ones are sensitive nets. Route them.
- Route Vin and Enable controller nets.
- Complete the route of primary
(The controller has not a Decoupling Capacitor ? Are you sure of this?)
2.- A connector for trasformer sounds a problems maker. Could you solder your Custom Transforme in the PCB? It would be better. If you cann't, I you sugggest a 2 row 2 columns conectors. In this way you can gain more space between primary and secondary, and more space between trafo pins.
OK and now. Your questions.
1.- Yes, try to keep separate switching ground from control ground, but connect to the same ground, in your case Bottom layer. For this, try to keep the "switching loop" components together according the placement I suggest.
Connecting R8 to Vin through one track and then one via to GND is not a good idea in your current layout.
2.- Ummm... I would try another layout before consider this question.
3.- I cann't undestand this question. What do you mean?
4.- As a rule, It better If you fill the empty area with hatched copper. It improve the etching process in PCB manufactureing.
5.- As a starting point, fill as much as you can. Do you need consider any electrical isolation between primary and secondary.
Good luck!
You don't really need to tell KiCad that the pins are connected elsewhere. DRC and ERC errors will not prevent the program from producing Gerber files - they are just warnings to you that something doesn't comply with the rules you have given to program.
It is safe to ignore DRC and ERC errors, providing you know why the errors are there, and are certain that they are acceptable. It is, of course, best if you can clear all errors, but occasionally some errors are unavoidable (or it is too hard to adjust the rules to avoid the errors).
Best Answer
I think an example worth a million words, so I wanted to make a tutorial on this.
Here is the box I am going to create an outline for:
Here is an example PCB drawing from the datasheet of the box:
After opening up Pcbnew, select the layer for edges. In the current version of KiCad (BZR4008), it is called "Edge.Cuts". First, I am going to draw the upper and lower edges, which are 62 mm. Then the left and right edges, which are 32 mm. I am using the tool below which has a tooltip of "Add graphic line or polygon".
Now that everything is fine, I can draw the other shapes:
Here is the tool we are going to use for that:
This tool is basically a partial circle. To use it, click on the point which will be the center of your circle, then with the mouse, you will set the radius with a visual aid of the KiCad. A very helpful thing is to change the cursor so it shows full coordinates, with the button shown below:
Just for the sake of an example, let's make the edge facing outside:
You cannot make correct ellipses with this method, unfortunately. You have to use the graphic embedding, or the approximation methods for that, which were mentioned by Nick Alexeev.