Electronic – How interrupts handle does work on a physical layer

cpuinterrupts

I want to understand how HW IRQ does work on a physical layer. I ask my question considering a specific example. As known after a packet coming to a network adapter a hardware interrupt is signalling. Wiki says that

an interrupt is a signal to the processor emitted by hardware or
software indicating an event that needs immediate attention.

I know that OS will be invoke a corresponding interrupt handler when the interrupt's type will be detected. But I don't understand how does CPU detect and distinguish incoming interrupts. Now I ask my questions:

First, why CPU does know that the interrupt is coming from network adapter, but not from other devices?

Second, Where does interrupt handlers registered in CPU? Is there exist a specific CPU's area which contains handler's addresses registered by OS?

Best Answer

The details depend entirely on the CPU, so you're best to pick your favorite CPU and study it in detail. For more general knowledge, there are books on computer architectures, like those by William Stallings.

In one of the simplest, traditional designs, the CPU simply does not "know" at all which device interrupted it. The CPU has a single interrupt line. If there are multiple devices, they are all tied to that single line: for instance, with a big OR gate. When the CPU handles the interrupt, the top level of the interrupt handling routine has to interrogate all of the devices by peeking at their respective status registers, to determine which one, or which ones, require service. When they are properly dealt with, they de-assert the interrupt signal. Blocking specific interrupts can be implemented by making the external circuit sophisticated so that it can be programmed to selectively ignore some of its inputs.

This design can be improved upon in a myriad ways. For instance, there can be protocols whereby an interrupting device has to invoke a special bus cycle, and place its ID (8 bits or whatever) on the data bus, such that the CPU picks it up. The ID can then be used to index into an interrupt vector to dispatch an appropriate interrupt.

A processor doesn't even have to have interrupt pins; in one possible design, an interrupt is simulated when a device makes a write to some special memory location. Effectively, the address and data pins of the CPU serve as the interrupt inputs. See Message Signaled Interrupts.

Related Solutions

Electronic – How does a CPU work

A detailed answer is not so much a company secret, but rather the subject of several semesters at a University. Don't expect to get a complete answer here.

One of the best books on the topic is this one: http://www.amazon.com/Computer-Architecture-Fifth-Quantitative-Approach/dp/012383872X/ref=ntt_at_ep_dpt_1

There are also numerous books on digital logic design that would be good to read as well.

Electronic – How to use interrupts in micro C

This may be a bit obvious answer, but since there are no other answers and the device is PIC16, I think that the only way to get levels is using a block of if or equivalent statements.

For example something like this:

interrupt()
{
  if(A)
    {
      handle(A);
    }
  if(B)
    {
     handle(B);
    }
}

Basically inside the interrupt function, which in mikroC has to be void interupt(void) for normal and high level interrupts and void interrupt_low (void) for low level interrupts on 18F or declared using iv keyword, you place a list ifs which check each interrupt flag in order you like. Inside the if you place the handler that handles the interrupt and clears the flag and then go on to the net flag. Unfortunately, that means that there is no easy way to implement multiple levels of interrupts.

One "hack" could be to check for interrupt flags you want to have higher priority inside of a if block of a lower priority interrupt before parts which take long time. This however leads to long and complicated interrupt service routines.

For example

interrupt()
{
  if(A)
    {
      handle(A);
    }
  if(B)//B takes a long time and several steps
    {
     init(B);
     if(A)
     {
       handle(A);
     }

     handle(B);//This takes long time
    }
}

Another way would be to move the interrupt processing from the ISR to the main loop, if you can. Make some global variables (declared outside of any functions) and use them a flags which will be set in the ISR and then processed inside the main loop. In case you have some very critical interrupts which cannot wait for the main loop to come and process them, you could make the hybrid approach. Place the handling routines for the most important interrupts in the ISR and for the rest of the interrupts use flags which will be processed in the main loop. You could even add few more "levels" of interrupts by checking flags set by the ISR for the more important interrupts several times in the main loop and for the less important interrupts only at the beginning or the end of the loop.

For example

char a,b,c;

interrupt()
{
   if(A)
        {
          handle(A);
        }
      if(B)
        {
         b=1;
         clear_B_interrupt_Flag;
        }
    }

main()
{

  while (1)
  {

   if(b)
    {
      handle(B);
      b=0;
    }
  }
}

Here's the link for the mikroElektronika's documentation for interrupts.

Best Answer

Related Solutions

Electronic – How does a CPU work

Electronic – How to use interrupts in micro C

Related Topic