So far in order to simulate CMOS circuits I relied on a library that I had to randomly download from Internet such as this one:
http://ecee.colorado.edu/~ecen4827/spice/ltspice/5827_035.lib
Inside the library the PMOS and NMOS model is defined using the BSIM3v3 model and I only have to create an instance of these transistors and wire them together and run the simulator.
My first question is that from where the professor of that class got this BSIM3v3 CMOS SPICE model?
Second question is: "Can I create my own transistors and extract such parameters and put them in my own library file?"
The only thing that comes to my mind is to use IC layout editors such as Cadence virtuoso or Microwind (I don't even know if they are the right software for this task, I just HEARD they can be used for IC design) to layout my transistor and then extract the SPICE parameter from them.
My ultimate goal is to design a simple standard CMOS digital cell library and use it for my more complex VLSI designs.
Best Answer
Usually the transistor parameters are provided to the customer by the foundry after signing an NDA (non-disclosure agreement).
Transistor modeling and parameter extraction is a nontrivial task and usually based on a large number of measurements to get reliable data for the models. Of course with an automated setup this task can be done very efficiently. Just have a look at a BSIM model file and the number of parameters there to get an impression of the required effort.
Extraction of layout data does not result in transistors models. By extraction just the transistor geometry is obtained. Existing transistor models are needed for simulation.
I think the models you found on the internet are a good starting point as they seem to be based on an existing CMOS process.