CMOS greatly reduces the current draw of ICs because one of the complementary FETs is always in the non-conducting mode, so there is only a flow of current during the transition between states, which is just the amount of charge on the gate's equivalent capacitance and maybe some leakage when both gates are open momentarily.
Is it theoretically possible to make a logic gate that has zero leakage while changing states (using any realistic technology), and the signal is just passed through the circuit as changes in voltage causing other changes in voltage? If not, what's the theoretical minimum?
Best Answer
It is not possible to make an electronic logic gate that functions even when its current is always zero.
However, it is possible to arrange CMOS electronic logic gates in such a way that the energy capacitively stored on the transistor gates is later returned to the power supply, so it is using almost zero net power. Once the system is powered up and all the bypass capacitors are fully charged, those logic gates can do an arbitrarily large amount of computation while pulling nearly zero current from the battery. Such arrangements are often called non-destructive computing.
Also, there are many ways to build logically equivalent computational structures without any electronic devices. Such non-electronic logic gates naturally use zero current, although nearly all of them require much more power to operate than their logically equivalent electronic logic gate.
non-electronic computing
Some non-electronic logic gates are listed in the article "Ten weirdest computers".
A few more non-electronic logic gates that are apparently not quite weird enough to make that article:
David Cary has designed a CPU to be built entirely out of spool valves, and is still pondering whether to power the thing with traditional hydraulic oil pressure, water pressure, or air pressure.
The fluidic logic gates have no moving parts, if you don't count the fluid moving through them as a "part".
(Is there an article on Wikipedia or some other wiki with a list of ways to implement the abstract concept of a "logic gate" ?)
non-destructive computing
Non-destructive computing, also called reversible computing, Charge Recovery Logic, or Adiabatic Logic, involves gates that use almost zero power.
When a computational system erases a bit of information, it must dissipate a theoretical minimum energy of kT ln(2) -- the von Neumann-Landauer limit -- where k is Boltzmann's constant and T is the temperature.
Most logic gates erase a bit of information for every logic operation. However, there are a few logic gates that preserve every bit. In theory these non-destructive logic gates could use far less power than the theoretical minimum power of bit-destructive logic gates.
"Reversible Logic" by Ralph C. Merkle at Zyvex
RevComp - The Reversible and Quantum Computing Research Group has some nice photos of their reversible CPU.