I have built this clock circuit (with a 4MHz crystal rather than the 1Mhz shown in the image):
I am concerned about the wave form that I see on my scope. It doesn't look very clean on the top (see image below). I plan to use this as a clock for driving a microprocessor. My question is whether this wave form is 'good enough'? Also, an observation: this noise at the top seems to be caused by some sort of interference. When I physically come closer to the circuit (lean in), the wave form suddenly becomes clean (see second image below). But then after a couple of seconds it starts 'bleeding' the noise and stabilizes into wave form shown in the first image. I am not sure what is going on exactly.
Update
A few comments suggested changing the duration per division on the scope. Setting this to 2ms/div does indeed show some strange ripple:
I disconnected the clock circuit and measured the power supply directly and it too shows a ripple at 2ms/div. So looks like this is a power supply issue? 😐
Update 2
It indeed was the power supply. Swapped it out with a 5v Apple iPhone charger and now I'm getting a clean, stable clock signal! Thanks to everyone for the help in debugging this.
Best Answer
Switch the scope trigger to "LINE". And drop the sweep to 2 milli Seconds per division. This may reveal the cause.
Otherwise, slow the sweep to 10 microSeconds/divison, and set the trigger to DC Internal, then adjust the trigger level to be near the waveform top. This may reveal SwitchReg ripple.
As the comments suggest, have 0.1uF cap across VDD/GND within 1cm of the oscillator.
And have your scope probe Ground lead going to the bottom of that Scope Ground lead.
Other circuits sharing the VDD, such as MCU, thru long leads/wires to the power supply may cause this. But the smoothness of the waveform's top suggests there is no high_frequency energy here.