I'm designing a very basic circuit for testing a switch sequence. I'm using a CMOS decoder CD4028B (link to datasheet) and XOR gate (CD74HC86E – link to datasheet). Reading the switch sequence is crucial and therefore I've been thinking whether I should add pull-down resistors to all inputs of the decoder and XOR gate to prevent pin-floating and false readings? I went through the datasheet and there was no recommendation whether pull-downs should be added to prevent pin-floating. Do these logic gates usually provide internal pull-down resistors or is it necessary to add them yourself? What values are recommended? I want to draw as little current as possible. I'm sorry if this is a really basic question. We made quite a few circuits with logic gates in college but never talked about the pin-floating and current draw aspect of these circuits.
Inputs of decoder are wired to the switch that is being tested, outputs of decoder are then wired to XOR gate inputs and XOR gate outputs are then wired to BJTs to drive LEDs.
Any help would be greatly appreciated. 🙂
Thank you.
Best Answer
CD40xx and HC74xx circuits do not include pullups or pulldowns on their inputs.
CD40xx and HC74xx inputs must not be allowed to float. They must always be driven with a defined logic level, from a logic output, from a pullup or pulldown, or a switch to ground or rail.
If CMOS inputs are allowed to float, they could end up in the middle linear region, which at best causes nonsense outputs, and at worst causes oscillation which draws excessive power and causes the chip to fail through overheating.
As CMOS needs very little (nominally zero) (leakage only) current, very large resistors can be used as pullups or pulldowns if speed is not an issue.
1Mohm100k would draw only a few 10s of uA, and would be more than enough to keep all types of CD40xx inputs biassed properly (WRB says he's found one brand that specifies 5uA leakage max, though I've only seen 1uA in my (admittedly quick) survey of them).