Hi, I have been trying to figure out which circuit is inside the SAR block. I've looking in the internet but I haven't found anything yet. Does any one know how the circuit inside the SAR looks like?
Electronic – SAR Circuit in Analog to Digital Converter
analogdigital-logic
Related Solutions
The ATMEGA328P that the Arduino runs on (assuming an UNO or similar) has an input resistance of 100MΩ on the analogue inputs:
So, at a maximum of 5V, the current draw would be:
\$I = \frac{V}{R} = \frac{5}{100000000} = 0.00000005A = 50nA\$
Half level would be 2.5V, so 25nA, etc.
Like you already suspect a DMM won't give you necessarily the answer. If the only levels you read are only 3.3V (capital "V", since it's derived from a person's name) and 0V it's a safe bet that it's digital. A PWM signal is also digital, but will show a voltage between 3.3V and 0V on a DMM, since it includes a low-pass filter. The DMM won't tell an analog and PWM signal apart. You'll need an oscilloscope to actually see what the signal looks like.
If you can trace the signal back to the output of a microcontroller, without filtering, it's most likely a digital signal. While most microcontroller families are available with on-chip ADC, very few also have DACs on board.
Related Topic
- Electronic – Purpose of the logic gate configurations on the Kenbak-1
- Electronic – How to analyze analog circuits with transistors [is this circuit immediately analyzable to anyone]
- How to you design a frequency divider circuit
- Electrical – Digital counter with analog output
- Electrical – Opamp with multiple feedback loops
- Electronic – Digital to Analog (DAC) design with MOS transistors
Best Answer
It is essentially a sort of parallel-set / serial-in / parallel-out shift register with a twist.
It starts with 1000 (assuming four bits). When the comparator deems this value too low, a 1 is shifted in at the high side, when it is deemed too high, a 0 is shifted in. In both cases 1 bit of the result (the MSB) has been determined.
Now the value is x100, and the cycle is repeated three more times to determine the next 3 bits, but those bits are shifted in at positions 2, 1 and 0 instead of at the highest bit.