Electronic – Vias without annular ring on internal layers, non-functional pads in a via

2) I highly recommend AGAINST cutting ground anywhere near high-speed signals. Stray capacitance really doesn't have too much of an effect on digital electronics. Usually stray capacitance kills you when it acts to create a parasitic filter at the input of an op amp.

In fact, it is highly recommended to run your high-speed signals directly overtop of an unbroken ground plane; this is called a "microstrip". The reason is that high frequency current follows the path of least inductance. With a ground plane, this path will be a mirror image of the signal trace. This minimizes the size of the loop, which in turn minimizes radiated EMI.

A very striking example of this can be seen on Dr. Howard Johnson's web site. See figures 8 and 9 for an example of high-frequency current taking the path of least inductance. (in case you didn't know, Dr. Johnson is an authority on signal integrity, author of the much lauded "High-Speed Digital Design: A Handbook of Black Magic")

It's important to note that any cuts in the ground plane underneath one of these high-speed digital signals will increase the size of the loop because the return current must take a detour around your cutout, which leads to increased emissions as well. You want a totally unbroken plane underneath all your digital signals. It's also important to note that the power plane is also a reference plane just like the ground plane, and from a high-frequency perspective these two planes are connected via bypass capacitors, so you can consider a high-frequency return current to "jump" planes near the caps.

3) If you have a good ground plane, there's pretty much no reason to use a guard trace. The exception would be the op amp I mentioned earlier, because you may have cut the ground plane underneath it. But you still need to worry about the parasitic capacitance of a guard trace. Once again, Dr. Johnson is here to help with pretty pictures.

4.1) I believe that multiple small vias will have better inductance properties since they are in parallel, versus one large via taking up approximately the same amount of space. Unfortunately I cannot remember what I read that led me to believe this. I think it's because inductance of a via is linearly inversely proportional to radius, but the area of the via is quadratically directly proportional to the radius. (source: Dr. Johnson again) Make the via radius 2x bigger, and it has half the inductance but takes up 4x as much area.

Generally, the annular ring spec, for buried vias or through vias, is driven by the accuracy of the drill hole locations relative to the copper features. You want to have a ring big enough that even with the maximum error in the drilling location, the drill hole is still completely surrounded by the pad (some rules might allow the hole to "break out" of the pad by a small fraction of it's circumference).

So if your buried vias are drilled on the same machine as your through vias, I'd expect to have the same annular ring requirements. If for some reason your shop uses a different tool for drilling buried vias, they may give you a different requirement. Also, of course if your buried vias are laser-drilled or something, of course there could be an entirely different spec.

So, like most questions on PCB tolerances, it comes down to asking your shop. Even better, ask several shops and use a rule that will give you flexibility to use whichever one gives you the best bid when it comes time to order the boards.