I have a SoC connects to a DSP with SPI. They are all powered by 1.8V, so I didn't even compare SoC's Voh and DSP's Vih at the first time, they should working fine. However, yesterday my colleague told me that the SoC's Voh cannot satisfy DSP's Vih, so I have a detail look:
You can see the SoC's Voh is at least 0.75*VDD, which is standard 1.8V CMOS Voh (Vcc-0.45).
For the DSP's Vih, it is 0.8Vdd, which is higher than standard 1.8V CMOS Vih (0.65Vcc).
So from the datasheet view, I cannot connect these SoC and DSP together?
Or the minimum Voh is based on highest source current, I need to consider the output impedance of SoC, and input impedance of DSP or maybe also capacitance?
Best Answer
You have an almost equivalent problem with the low level signal interface between these two devices. The SOC VOL is stated to be guaranteed to be less than 0.25*DVDD.
On the other hand the VIL of the DSP states that its range for input low must be no more than 0.20*TVDD.
This spreadsheet chart illustrates both the high and low levels.
So if the 1.8V supplies to both parts are one and the same voltage rail you are going to have problems with guaranteed for both high and low signal levels. Buffering with a suitable external IC may be the solution to keep things simple.
Lastly I have to point out that the specifications of the SOC leave something to be desired considering the blatant carelessness pointed out below.