I read that the propagation delay of CMOS logic gate is longer than TTL; therefore they are not used where speed of processing is important. I thought computers or computer cpu is using CMOS. According to the text I read it says CMOS is not used in computers. Is that true?
Electronic – Which logic gate family is used in a PC? TTL or CMOS
cmosttl
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The first comprehensive logic series was the TTL series 74xx. This used BJTs (Bipolar Junction Transistors). Later there came variants like the often used 74LSxx, where the "LS" stands for Low-power Schottky TTL. As the name implies these used less power than the rather power-hungry TTL, and were faster too. At the same time the CMOS 4000 series was developed. The "C" in CMOS stands for Complementary, meaning it's a combination of N-channel and P-channel MOSFETs. Their construction is simpler than TTL and they use far less power. Later standard CMOS developed into HCMOS, "H" for High-speed. Most 74LSxx types have been released as HCMOS in the 74HCxx series, or the 74HCTxx series, which is TTL compatible. Later more variants were developed, like Advanced CMOS (74ACxx).
Microcontrollers are built in HCMOS technology, so they use MOSFETs. AFAIK JFETs aren't used for logic ICs. The transistor you show in the picture is a BJT, which you can tell from the pin designation:
E = Emitter
B = Base
C = Collector
For a MOSFET the pins would be
S = Source
G = Gate
D = Drain
respectively.
Many ICs in the 74HCxx series were originally released in 14 or 16 pin DIL packages, which meant that they would fit four 2-input gates. With miniaturization (SMT) came the demand for smaller packages, even if they contained less gates. Several manufacturers offer single-gate and dual-gate versions of logic gates. For example, NXP has a 74LVC1G00 (single 2-input NAND) and a 74LVC2G00 (dual 2-input NAND) version of the classical 74HC00. 74LVCxx is yet another HCMOS technology. This page lists all NXP logic families.
No, the circuit structures to produce gates in TTL and CMOS are very different.
It's actually a very complex topic, because at this level, you can't just treat transistors (BJTs or FETs) as simple "switches". It becomes an analog circuit design problem in which many issues need to be considered: how static and dynamic currents flow, where charges are stored on the various internal "nodes", connectivity among gates (fan-in and fan-out), etc.
Also, different types of transistor technology have different ways in which they can be applied. "True" TTL (74xx, 74Lxx, 74Hxx, 74Sxx) uses a single multi-emitter transistor to create a basic NAND structure with an arbitrary number of inputs; the rest of the circuitry is basically buffers so that the gate can drive the next gate(s) downstream.
LSTTL is really an advanced form of DTL (diode-transistor logic), in which the basic structure is an AND gate; again, the transistors are mainly for buffering.
In CMOS, the basic structure is a 2-transistor inverter. To create other logic functions, additional transistors are added in series/parallel with the original pullup/pulldown transistors of the inverter. Ideally, there is no static current draw at all, just the dynamic current of charging and discharging gate capacitances.
PMOS and NMOS were never offered as standardized gates in SSI/MSI packages, but these technologies were widely used in custom IC design for quite a while. The basic gate structure is basically half a CMOS gate, but with a passive pullup (a transistor used as a current source) as a load. All of the early microprocessor chips were built with these technologies.
Any technology based on MOS transistors has very high input impedances, which means that charge storage is a viable way of remembering data values, at least for short time periods. This can save a lot of transistors, and is why most early microprocessors had minimum as well as maximum clock frequencies. This technique can't be used with BJT technology.
Best Answer
First off, take that book, douse it in gasoline/petrol and burn it. Secondly, saying that something is CMOS is akin to saying that something is a circuit. There are so many variants ... Even 25 to 30 years ago CMOS ASIC flows (Gate arrays, or Sea of Gates) approaches were already way faster than any of the discrete forms of logic (AS, LS etc.). You first saw discrete logic chips that then integrated more transistors, these became known as MSI (Medium Scale integration) designs (like UARTS etc.) that may have been built on similar CMOS processes. But by the time that LSI (large scale integration) designs started to come out the processes for discrete and integrated CMOS had bifurcated and diverged. Probably at the 3 um node LSI and VLSI (Very large scale integration) design never looked back. Microprocessor processes (also CMOS) had their own design methodology and techniques.
Even at the time of publishing that book had it wrong. We were in the midst of the latest 0.13um process technology, worrying about scaling effects and yield in these new radically smaller transistors. Going from 2 um to now 20 nm (arms fully waving now) which is a factor of 100X and a scaling according to Moore's law of sqrt(2) roughly translates into 14 generations of scaling /changes.
Just to give to perspective, in 0.18 um process technology you can build a pretty sweet op-amp that has a unity gain bandwidth of about 1.2 GHz (0.8 ns) which is good for 14 bits SNR. This is CMOS technology that dates back to the late 1990's.
If I recall correctly, you could build 2 GHz logic designs in 0.13um processes with full clock trees and fan out quite nicely.