That's the Cypress FX2LP USB microcontroller (I recognize it because I use it myself). If you're using the Hi-Speed USB transceiver, then you should really go with a 4-layer board. Without that ground plane right below the top layer, it will be near impossible to get the 90 ohm differential impedance that you want for the USB D+/D- lines.

http://www.cypress.com/?id=4&rID=34128 flat out states that 4 layers is required. It also states that controlled impedance is required, but in my experience you can usually get away without it, so long as you carefully research your fab's typical stack-up and work out the right width, space, and height.

http://www.cypress.com/?docID=25406 also provides more info on calculating the width, space, and height for the D+ and D- lines.

4-layers isn't that much more expensive; Advanced Circuits has a 66 each deal for 4 layer boards that I use quite often for projects that use that very chip, as opposed to the 33 each deal for 2 layers.

In regards to your actual question...use plenty of bypass caps, as close to the pins as possible. If you split the bottom layer to have VCC and GND, don't have a trace cross the split on the top layer. Keep all high-speed signals on the top layer because the via inductance can kill what fragile signal integrity a 2-layer board has.

In general, I would say keep the top-side pour; it certainly does no harm, and it has some secondary benefits, such as less etching required and less thermal stress on the board during reflow.

You do still need to pay attention to current loops and place the vias appropriately, not just scattering them about randomly. Since the FT232R is the only active chip on the board, focus on its outputs. There are two LEDs that are powered by V_USB, and a few outputs associated with the serial port that are powered by V_CC. Where do the currents flow when any of these outputs change state? Try to keep the paths as short and direct as possible.

Note in particular, the ground path for the USB connector in your non-pour example. It has to go down, cross below the chip, then come up on the right before it gets to the ground pins on the top of the chip. The top-side pour shortens this considerably. In either case, it would help if you adjusted the vias near pin 1 of the chip so that the bottom pour is continuous there.

One side point about your design: Try to avoid having three etches come together at an acute angle, like you have on your Vcc trace. Make that a right-angle tee connection.