Evaluate logical expression with a couple NAND gates

First off - don't believe everything you read - the single transistor may be crude but it works. Where it falls down is that its not particularly fast switching or useful when you come to design integrated circuits. The 'replacement circuit' is the basis of a ttl logic gate. (7400 series) which has subsequently been replaced by CMOS circuitry which at some point in the future will be replaced by something else.

If all you want is a simple (single) NOT gate then the single transistor could be way to go. It all depends on the requirements of your circuit (speed, voltage range, logic levels etc.)

The main problems are;

(1) fanout - how much current can you take from the output without lowering the output voltage too much.

(2) Logic level tolerence (noise margin) - What value of voltage constitutes a '1' or a '0'. In a one transistor circuit anything over 0.6V would be seen as a '1'. The saturation of the transistor may be 0.3V so it doesn't leave much of margin for error.

If we allow exor gates then here is a solution.

1st col 4th map: (A exor C) + AB

2nd col 2nd map: (A exor B) + ABC

2nd col 3rd map: !(A exor C) + AB, alternatively (A exnor C) + AB

Edit:

Take col 1 map 4 for example. The first two columns have a pattern I recognize as an XOR gate. First row is 01, second row is 10. Now I look at the boxes with '1', A changes when jumping between the two. Look for another variable that is also changing; in this case it is C. A and C are either 01 or 10 in the '1' boxes: that is the characteristics of an XOR gate. Only two '1' remain in the map and they are grouped into the term AB.

Now col 2 map 2: Here are two groups that will work for an XOR gate; col 1 & 4, and col 3 & 4. The first group produces an XOR gate, the second an XNOR gate. In the XNOR gate, both inputs must be equal to produce a '1' on the output.

Finally col 2 map 3. This map looks like col 1 map 4, except the XOR pattern is reversed. That means we use an XNOR gate instead of the XOR in the first map, or we add an inverter to the XOR output.

By the way, regarding your equation for col 1 map 4, notice that the two bottom corners both have '1'. You can group them to produce the term A!C, reducing your third term to two variables.