I will need to communicate with a device using serial protocol mostly similar to SPI but with several changes:
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Data packet can has any bit length (e.g. 35 bits)
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Stop sequence formed by lack of clocks for time more than needed to transmit 2 data bits
I could handle this by software implementation of this protocol, but the communication frequency is 40 MHz (20 Mbits/s) so I will need pretty fast controller to handle this.
Now I'm looking for two possibilities:
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Use the controller having more flexible SPI (I don't even know where I could look for it, if any of AVR will fit my needs I will be happy).
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Attach a hardware shift register to general purpose controller (most likely AVR in my case).
Surely I'd prefer the first option. Any thoughts?
Best Answer
SPI peripheral inside a general purpose microcontroller (AVR, or PIC, or MSP40, etc) is hardwired to a large extent. It is what it is. Transaction stop sequence is formed by the CS# line.
Want to use a non-standard SPI-esque communication format with framing bits? I think, it would be safe to assume that there isn't a general purpose microcontroller (μC) with a flexible enough SPI peripheral that can support that.
Probably, a good bet would be to use programmable logic (similar to your idea about external shift register). You could program a CPLD (or FPGA) to convert from non-standard SPI-esque protocol to normal SPI, then a general purpose μC would read the data through normal SPI. There are also Cypress PSoC microcontrollers with built-in CPLD fabric.