How to choose flip flop type for implementation

From a discrete logic & HDL perspective:

-Mealy machines (generally) have less states. Mealy machines change their output based on their current input and present state, rather than just the present state. However, less states doesn't always mean simpler to implement.

-Moore machines may be safer to use, because they change states on the clock edge (if you are using DFF logic for present and next state), whereas Mealy machines are faster, because the state is dependent on the input. Thus, the state can change asynchronously. This comes down to predictability vs raw speed. When it comes down to it, it's difficult to draw hard lines where one machine would always be better than the other.

It really comes down to the specific task at hand. Does one want to have a synchronous or asynchronous machine? Is speed paramount? Will there be potential unstable (bouncing) signals? Are both the inputs and present state readily available? The answer to each of these questions determines the type of machine that would work best.

It's worth mentioning that for a hardware implementation, Mealy machines require less hardware in their circuits, but when working with an HDL and RTL scenario, the actual amount of discrete hardware may not be terribly important.

At its simplest, for every state machine you have three variables:

1. Inputs - Driven to the state machine. Not directly controlled by the FSM design.
2. State - Internal information about the current state the machine is in.
3. Outputs - Driven out of the state machine.

The state machine design about how it defines State and Outputs based on a series of Inputs over time. The State is registered, so on every cycle, you are trying to figure out the next State. The output is combinatorial, so you need to figure out the current output.

For both Mealy and Moore, the next State is determined by some combination of the inputs, current state, and current output. So it's a bunch of things like:

if (current_state == 5) 
    next_state = 6;
else if (current_state == 4 && input[3] == 1) 
    next_state = 5;
etc...

The output is typically not sequential, but rather combinatorial. And what is used to calculate this output defines whether it is Mealy or Moore.

The more general case is the Mealy FSM which calculates the output with some combination (i.e. AND/OR/NOT, comparators, etc.) of Input and (current) State.

So again, things like:

if (current_state == 5) 
    output = 1;
else if (current_state == 4)
    if (input[3] == 1) 
        output = 2;
    else
        output = 3;
etc..

But if we restrict ourselves to only calculating based on State, it is a Moore FSM. In this case, it would look like:

if (current_state == 5) 
    output = 1;
else if (current_state == 4)
    output = 2;
else if (current_state == 2 || current_state == 3)
    output = 3;
etc..

That really is it. Nothing else. And to top it off, you can convert one form to an equivalent form of the other.

One question that is often unasked is "Why do we separate them into two classes and give them names? Why is it so important?"

The answer is because as you try to create FSMs in real practical circuits, you will find that you are generally able to get better performance from a Moore machine. (They usually can run at higher frequencies). However, for many people intuition leads them to think about state machine problems more closely to the Mealy model.

By classifying them, we can teach ourselves to think about state machines problems in both models. This allows you to pick the correct model for the problem you are trying to solve. The details about why Moore runs faster and the tradeoffs between when to choose the two designs comes with experience and knowledge about digital design.