Implementing F using a demultiplexer and an extra AND gate

designlogic-gatesmultiplexer

Use a 1-to-8 Demultiplexer and an extra AND gate to create the function:

F(x,y,z) = ∑m(1,3,5)

If I were using an OR gate I think this would be trivial, simply put the 1 3 and 5 from the demultiplexer in to an OR gate and have the output go to F. But using an AND gate for this, I have no idea how?

Best Answer

Output F needs to be active for all odd numbers except 7. So...

LSB to mux 20 input, mux outputs '0' for even numbers and '1' for odd numbers. AND gate detects 7, output to mux 21 input forces it to output '3' instead of '1'.

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