Consider a SR latch. I have a doubt in that. why the outputs of a latch are always complement to each other.
Please clarify this to me,take any input and show that P is complement of Q.
Also in textbook they have given 11 input combination is forbidden,so that shouldn't be applied.
What happens if we really give 11 input,do we get output or don't or what will happen?????
Operation of a basic SR latch
digital-logic
Related Solutions
First a slight correction to your diagram. The NOT Q output is the output of the NOR1 gate, not the input you have shown.
When both inputs are LOW (0) the latch holds it state.
With S, R = 0, 0
If Q = 1, then NOR1 input is 0,1 and its output (NOT Q) is 0 keeping Q = 1 If Q = 0, then NOR1 input is 0,0 and its output (NOT Q) is 1 keeping Q = 0
i.e. NO CHANGE
If S = 1 (R = 0) then the output of NOR1 (NOT Q) will be 0 and the output of NOR2 (Q) will be 1 - the latch is SET, Q is HIGH
If R = 1 (S = 0) then the output of NOR2 (Q) will be 0 and the output of NOR1 (NOT Q) will be 1 - the latch is RESET, Q is LOW
The problem comes when both S and R inputs are taken HIGH at the same time and forms a race condition. This logical condition (S = 1, R = 1) is to be avoided as the output cannot be determined.
If SR is 11 then the outputs of the cross-coupled NOR gates is 00 (defined).
(from the book)
Assume typos in this book..
Best Answer
In order to understand SR latch, you should know the initial output values P and Q. In working of latch we want P and Q to be complement of each other.That's how latch works.
Once we have that in mind see the following truth table for NOR gate
Now, see the output when A=1 and B=0,1. When one of the input (A=1) of NOR gate is one irrespective of the value of the other input (B=0 or 1), output is going to be zero. This is the reason why both inputs in SR latch can't be 1. Because once both inputs S and R are 1 even though initial values of outputs(P=0,Q=1 or P=1,Q=0) are complement of each other, it will make both outputs P and Q to be equal to 0 which is invalid as functionality of latch. Hence, both S and R as 1 is prohibited.
Once you know the initial output values(P and Q) and two inputs you can find the next output values by following truth table for NOR SR latch