I have created this ring counter using D Flip Flop in multisim(I am learning counters). It's not working maybe due to the switch provided on the top left for the preset pin of D Flip Flop. I have no idea how to correct it. Any help would be highly appreciated.
What’s wrong with this ring counter made using D Flip Flop
counterflipflop
Related Solutions
Common JK flip flops, such as the 7476 have both preset and clear inputs. These force the state of the FF asynchronously, i.e., without waiting for a clock edge. You can use a simple R-C circuit and a schmitt trigger buffer (or inverter) to give you a short (e.g., 50usec) active-low pulse at circuit power on, and feed this signal to the 'preset' inputs of the FF's that should start at '1', and to the 'clear' inputs of the FF's that need to start at 0. (The unused preset or clear of each FF should be pulled up to prevent erratic operation.) The spec sheet for the particular part will tell you how short this pulse can be made.
A design simplification is to first design the up/down Johnson and ring counters independently. Then just place a mux that selects Q* of either one depending on y.
simulate this circuit – Schematic created using CircuitLab
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Best Answer
Hmm, you could add a NAND3 gate from the first 3 outputs to the first D flip flop input so you'll get the first '1' in to the counter when the first 3 outputs are all zeroes. Or you could play with the resets. Or make some other combinatorial logic arrangement, depending on what your application for the ring counter is.