buseagle
Here is the part for which I am making an Eagle part.
Now it is completely possible that I draw the schematic symbol looking like thie exactly. It is how I have seen things done often. However, I am curious to find out that is it possible that I have a single pin in the schematic symbol like R[0..7] which covers all R0,R1,R2… upto R7? And then this single multi bit pin in the schematic symbol shall map tp 8 pins in the package. Is it possible to do this in Eagle?
No, you don't want to show multiple connections for the same physical pin on the schematic. This will lead to confusion because anyone else looking at the schematic will expect that each of those connections is actually a different physical pin.
You do this by listing all the possible pin functions in the pin name. For example, here is what my PIC 18F67J60 part looks like in a schematic:
First notice that power pins are at top and ground pins at bottom. That reduces some of the clutter around the remaining pins, and of course makes the schematic more clear on its own. In most cases, a circuit will only make use of one of the functions of each pin. It would be nice if there was a way to highlight the function or functions actually used, but removing the unused functions is worse. It can be quite useful to see what the part could have done or might do with different firmware.
Most of the time how a pin gets used is obvious from the schematic. One trick that greatly helps with this is to show logical direction for pins. I have little arrow symbols in Eagle just for that purpose. They are small and therefore don't get in the way, but help a great deal towards clarifying the circuit. Reasonable net names also help. Here is a small section of a schematic with the direction arrows and net names:
Particularly note the bottom two pins. Those are UART signals to another processor, so thereby are using the TX and RX functions of those pins. Each net can only have a single name, even though it will be the TX function (output) on one processor and the RX function (input) on the other. In this case I named the nets from this processor's point of view. This is the network processor within the overall device, so I named them NETTX and NETRX to help indicate the names are relative to this processor. However, there is potential for confusion at the other processor since NETTX will go into its RX pin and NETRX will go out of its TX pin. The arrows at the other processor will help a lot to head off a likely confusion.
"Invoke" command resolves this.
I've got only Eagle 5.11.0 in front of me at the moment. But, this haven't changed in 6.3.0
@ScottSeidman had beat me to the answer, while I was annotating the screenshot.
Best Answer
As far as I know, you can't assign multiple signals to one pin in Eagle, even if they have a common base name. How would you be able to show the individual pin numbers on the part?
However to avoid clutter in a schematic, you can create busses as shown below:
In the Name dialog, the nets are separated by commas, in this case EN,VALVE[0..11]. But you still have to have an individual pin for each net.