Electrical – Verilog: Instantiation of lpm_dff failed. The design unit was not found

digital-logicflipfloprtlverilog

I want to use lpm_dff components in my design. I can compile the code without problem in modelsim, But when i try to simulate my test bench i receive this error. I also add lpm library when i simulate the test bench.

Can someone help me fix the problem?

Best Answer

The Altera edition of ModelSim (including the free starter version) contains precompiled libraries for all of the Altera primitive IP cores (LPM cores, PLLs, RAMs, etc.). However in order to simulation with them you need to make sure you include the library that contains these parts.

For general cores, they are all in the altera_mf_ver library (for Verilog) or altera_mf library (VHDL versions).
For device specific parts like PLLs you would use the library for your device as well (e.g. cyclonev_ver is the Verilog library for Cyclone V devices).
For the LPM cores I believe they are in the lpm_ver library (for Verilog) or lpm library (for VHDL), but may also be in altera_mf_ver as well..

How to include the library will depend on how you are running the simulation.

If you are running it using the GUI (Simulate -> Start Simulation), simply select the required libraries in the Search Libraries (-L) box on the library tab of the start simulation screen.
If you are using command line, you can append the switch -L altera_mf_ver -L lpm_ver to the end of your vlog command.

Related Solutions

Electronic – Verilog – Referencing Flattened Busses in Module Instantiation

It seems like you are running into Verilog's Escape identifiers gotcha:

§2.7.1 Escaped identifiers

Escaped identifiers shall start with the backslash character () and end with white space (space, tab, newline). They provide a means of including any of the printable ASCII characters in an identifier (the decimal values 33 through 126, or 21 through 7E in hexadecimal).

Neither the leading backslash character nor the terminating white space is considered to be part of the identifier. Therefore, an escaped identifier \cpu3 is treated the same as a nonescaped identifier cpu3.

So not only you need to properly write down escaped port name, but you also need to make sure you don't forget to put a whitespace at the end. For example:

DES_SBOX1 feistel( .CLK(CLK_tb),
                 .\ptext[5] (ptext_tb[5]),
                 .\ptext[4] (ptext_tb[4]),
  ...

Hope it helps. Good Luck!

Electronic – How to Add the Xilinx Library to Modelsim

compile UNISIM libraries by runnin compxlib and following wizard.
then in your modelsim, library pane add new library.
after that add library from existing library and point to folder which contains compiled version of unisim, e.g. it is C:\Xilinx\10.1\ISE\vhdl\mti_se\unisim for me
After that you can have fun with UNISIM :)

Best Answer

Related Solutions

Electronic – Verilog – Referencing Flattened Busses in Module Instantiation

Electronic – How to Add the Xilinx Library to Modelsim

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