Silicon chips are made by slicing up wafers; in general, the fewer transistors a design needs, the smaller the area it needs, so the more chips you get out of a wafer, and the lower the cost per chip.
But there must be some limit to this. Maybe you can have a chip of one square millimeter area, but it seems unlikely that you could have a chip of one square micron area.
What is the minimum… To be specific, I'm not asking what is the minimum physically possible area, but what is the minimum area below which chips stop getting cheaper? The point at which you stop trying to shrink your design, because fewer transistors will no longer save money?
And has this remained roughly constant over the decades, or has it changed with iterations of process technology, and if so, in which direction?
Best Answer
The minimum area of the chip is determined by the most cost effective solution not the smallest physical possible cut.
The smallest cut defect-free with a kerf is roughly equal to the wafer thickness and the slotted diamond saw roughly equal to 1/2 of the wafer thickness.
Thus the question should be what is the cheapest way to process single diode junctions. As the biggest demand for single diode junctions appears to be LED's , the question should be what is the maximum number of LED's per wafer? Economy has driven the size of the LED up. There is no benefit to going smaller.
For any given chip on a die and wafer size, this calculation limits the maximum number of Die Per Wafer.
This is not the limit but is a calculator to determine the mechanical yield of a wafer.
The trend now is to make small flip chips with bump pads stacked on a system in package (SiP) or system-in-a-package with a number of integrated circuits enclosed in a single chip carrier package.