Would this be a good design of a stack machine

cpu

I've got an assignment to design a 8-bit stack machine I was wondering if this would work:
8bit Stack Machine Image

My problem is this i'm not too sure if this design will work, i've hardly found any designs on a zero adress machine and the ones I have found have had a mar and correct me if i'm wrong the mar is an adress register, how can it count as a zero address machine that uses an address register? I may have gotten something wrong somewhere but I can't see it. Will this design work as i'm not using any memory?

Best Answer

If I read stevenvh correctly, his solution entails having an addressable data space, albeit one 'hidden' from the usual load/store kinds of access. From a hardware standpoint, a data address leaves the CPU, goes to an external RAM, and a data bus transfers data to/from the CPU, indistinguishable from a traditional load/store kind of CPU. But if your CPU only allows the kinds of access he mentions to that data space, then the programming model necessarily has to be stack-oriented and that would therefore be a legitimate implementation.

That said, an alternative implementation would be to actually implement the data space as a stack. The CPU interface to the stack unit could be an 8 bit bi-directional data bus, with two control lines, one to push the current data into the stack, one to read out (and remove) the topmost word of the stack. Now to make things convenient for working with your ALU, you might make it possible to read the top word without removing it, and you might also want to have direct access to the 2nd word. There are really several other ways you could go, too. You could directly wire the top stack word to the ALU A input and the 2nd stack word to the ALU B input; or you could put in a temporary data register to hold one input to the ALU while the other input comes from the stack. (This is where the mods are getting uptight about the open-endedness of your question, an I can see why - I don't want to design this for you, but hopefully this will give you a couple of ideas)

Lastly, let's put a little scope on this stack. As you said '8 bit', it should be pointed out that back in the day, the 6502 got by with a mere 256 bytes of stack. Certain HP calculators are stack oriented and get by with just four levels of stack. So as an academic exercise, as a proof-of-concept as it were, you needn't be concerned about supplying gobs and gobs of memory for your stack. I'm not sure there's actually a single-chip LIFO device that you could use - but if there is, and it's small, don't be put off. Actually making a hardware stack out of 74hc374s or something would probably be un-fun, but again, on the plus side, you could do a lot with just a few stack levels.