I am studying for an exam and as a part of a question I have to explain biasing and operation of the voltage follower that uses two matched JFETs in the following arrangement:
I am not sure that I understand the self biasing of T2.
Vgs of T2 can't be positive because of the voltage drop across R2 when a current I flows, so T2 will never be fully "on", putting a limit on the maximum current I regardless of the input voltage, correct?
If that is so, is that maximum current I in practice lower than what is needed to achieve the desired drop, for the output to be equal to input?
Best Answer
Indeed the Vgs of T2 will be negative but that is the normal mode of operation for a JFET ! If Vgs was positive, a current can flow into the gate ! As jms mentions in the comments, a JFET is a depletion type device, it conducts current when Vgs = 0.
If R2 was not present (zero ohm) then T2 would also have a current source behaviour. In most JFET datasheets an Id is specified for Vgs = 0. By adding R2 the Vgs is made negative, pinching off the JFET's drain-source connection. So the Id is will be lower than Ids @ Vgs = 0 V.
T2 and R2 thus behave as a current source and this works by means of local feedback, if the drain current would increase, the voltage across R2 would also increase thus making Vgs even more negative and pinching off the current Id a bit more. This forms a local negative feedback loop.
So indeed, T2 is not "fully on" and it should not as this allows "breathing room" to regulate the current.
No the current I is just what you need to make Vin = Vout as T1 runs on the same current as T2 and as T1 and T2 are identical, T1 will have the same Vgs as T2 assuming R1 and R2 are also identical. The voltage across R2 is Vgs_T2, the voltage across R1 will be Vgs_T1 = Vgs_T2 because the currents are the same.